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Single-cycle processor

From Quire, the open reference··1 min read

A single cycle processor is a processor that carries out one instruction in a single clock cycle.^[1]

See also#edit

Complex instruction set computer, a processor executing one instruction in multiple clock cycles
DLX, a very similar architecture designed by John L. Hennessy (creator of MIPS) for teaching purposes
MIPS architecture, MIPS-32 architecture
MIPS-X, developed as a follow-on project to the MIPS architecture
Reduced instruction set computer, a processor executing one instruction in minimal clock cycles

References#edit

^ Harris (2016). Digital Design and Computer Architecture ARM Edition. Elsevier. sec. 7.3. ISBN 978-0-12-800056-4.

External links#edit

Categories Microprocessors Computer engineering stubs

This article is mirrored from “Single-cycle processor” on English Wikipedia, revision 1263686262, written by Wikipedia's contributors and licensed CC BY-SA 4.0. Editing it here creates a Quire copy with its own history.

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